Scot Schultz from Mellanox writes that the company is moving the industry forward to a world-class off-load network architecture that will pave the way to Exascale. “Mellanox, alongside many industry thought-leaders, is a leader in advancing the Co-Design approach. The key value and core goal is to strive for more CPU offload capabilities and acceleration techniques while maintaining forward and backward compatibility of new and existing infrastructures; and the result is nothing less than the world’s most advanced interconnect, which continues to yield the most powerful and efficient supercomputers ever deployed.”
In this research report, we reveal recent research showing that customers are feeling the need for speed—i.e. they’re looking for more processing cores. Not surprisingly, we found that they’re investing more money in accelerators like GPUs and moreover are seeing solid positive results from using GPUs. In the balance of this report, we take a look at these finding and and the newest GPU tech from NVIDIA and how it performs vs. traditional servers and earlier GPU products.
Today, to ready the United States for a future in which Artificial Intelligence (AI) plays a growing role, the White House is releasing a report on future directions and considerations for AI called Preparing for the Future of Artificial Intelligence. This report surveys the current state of AI, its existing and potential applications, and the questions that progress in AI raise for society and public policy.”
In this video from the HPC Advisory Council Spain Conference, Dan Olds from OrionX discusses the High Performance Interconnect (HPI) market landscape, plus provides ratings and rankings of HPI choices today. “In this talk, we’ll take a look at the technologies and performance of high-end networking technology and the coming battle between onloading vs. offloading interconnect architectures.”
Over at the Parallella Blog, Andreas Olafsson from Adapteva writes that the company has reached an important milestone on its next-generation Epiphany-V chip. “Thanks to a generous grant from DARPA, we just taped out a 16nm chip with 1024 64-bit processor cores. To give a comparison, our 4.5B transistor chip is smaller than Apple’s latest A10 chip and has 256 times as many processors. The chip offers an 80x processor density advantage over high performance chips from Intel and Nvidia.”
Nikos Trikoupis from the City University of New York gave this talk at the HPC User Forum in Austin. “We focus on measuring the aggregate throughput delivered by 12 Intel SSD DC P3700 for NVMe cards installed on the SGI UV 300 scale-up system in the CUNY High Performance Computing Center. We establish a performance baseline for a single SSD. The 12 SSDs are assembled into a single RAID-0 volume using Linux Software RAID and the XVM Volume Manager. The aggregate read and write throughput is measured against different configurations that include the XFS and the GPFS file systems.”
The CloudLightning Project in Europe has published preliminary results from a survey on Barriers to Using HPC in the Cloud. “Trust in cloud computing would appear to be a significant barrier to adopting cloud computing for HPC workloads. Data management concerns dominate the responses.”
Today Cycle Computing announced the Cloud-Agnostic Glossary, a solution brief written by Cycle Computing executives to help customers understand the different terms the different providers use and how they relate. “Technology keeps evolving, terms keep changing, and because of this, we were inspired to stop and take a moment to develop a glossary to keep track of meanings in real time, and according to vendor,” said Jason Stowe, CEO, Cycle Computing. “We ended up with this great solution brief, worthy of reading and sharing. It’s a useful document that we plan to update regularly.”
In this special guest feature from Scientific Computing World, Wolfgang Gentzsch explains the role of HPC container technology in providing ubiquitous access to HPC. “The advent of lightweight pervasive, packageable, portable, scalable, interactive, easy to access and use HPC application containers based on Docker technology running seamlessly on workstations, servers, and clouds, is bringing us ever closer to the democratization of HPC.”
The move to network offloading is the first step in co-designed systems. A large amount of overhead is required to service the huge number of packets required for modern data rates. This amount of overhead can significantly reduce network performance. Offloading network processing to the network interface card helped solve this bottleneck as well as some others.