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Basics For Coprocessors

“The Intel Xeon Phi coprocessor is an example of a many core system that can greatly increase the performance of an application when used correctly. Simply taking a serial application and expecting tremendous performance gains will not happen. Rewriting parts of the application will be necessary to take advantage of the architecture of the Intel Xeon Phi coprocessor.”

An Open Letter to the HPC Community

Altair is making a big investment toward uniting the whole HPC community to accelerate the state of the art (and the state of actual production operations) for HPC scheduling. Altair is joining the OpenHPC project with PBS Pro. They are focused on longevity – creating a viable, sustainable community to focus on job scheduling software that can truly bridge the gap in the HPC world.

Discover why GPUs are driving the future of HPC

According to the latest Intersect360 Research site census data, of the 50 most popular application packages mentioned by HPC users, 34 have offer GPU support, including 9 of the top 10. As is evident from the number of GPU-accelerated applications available in areas such as chemical research, physics, structural analysis, and visualization, the use of this accelerator technology has become well established in the HPC user community. “According to the latest Intersect360 Research site census data, of the 50 most popular application packages mentioned by HPC users, 34 have offer GPU support, including 9 of the top 10. As is evident from the number of GPU-accelerated applications available in areas such as chemical research, physics, structural analysis, and visualization, the use of this accelerator technology has become well established in the HPC user community.”

Application Performance & Power Consumption on Intel Xeon Phi

“While new technology will be developed that reduces the power per operation needed, in today’s environments it is important to understand how an application affects power usage. For modern applications that have been optimized to take advantage of both the Intel Xeon CPU and the Intel Xeon Phi coprocessor, the hardware mentioned does include various power states, which can minimize the power consumption when idle.”

Why New Intel® Xeon Processors Make Sense for HPC Applications

Through the microarchitecture improvements, increased core counts, and faster memory speeds of the new Intel Xeon processor E5-2600 v4 product family based on the “Broadwell” microarchitecture, you can increase your HPC application performance. You will see significantly improved per-core performance with these just announced Intel® Xeon® processors that can then be multiplied by parallel programs that utilize the number of cores available inside these processors. Improvements to the memory and virtual memory capabilities – including the ability to utilize faster DDR4-2400 memory – means that these processors can speed all aspects of your application from IO DMA operations, to processing serial sections of code, as well as delivering increased performance on both task- and data-parallel applications.

Intrinsic Vectorization for Intel Xeon Phi

“It is important to be able to express algorithms and then the coding in an architecture independent manner to gain maximum portability. Vectorization, using the available CPUs and coprocessors such as the Intel Xeon Phi coprocessor, are critical for HPC applications where performance is of the highest importance. However, since architectures change over time and become more powerful, using libraries that can adjust to the new architectures is quite important.”

Cooling Today’s Hot New Processors

Expected later in 2016, Intel will be releasing production versions of its Knights Landing (KNL) 72-core coprocessor. These next generation coprocessors are impacting the physical design of the supercomputers now coming down the pike in a number of ways. One of the most dramatic changes is the significant increase in cooling requirements – these are high wattage chips that run very hot and present some interesting engineering challenges for systems designers.

OpenMP and SIMD Instructions on Intel Xeon Phi

“Vector instruction sets have progressed over time, and it important to use the most appropriate vector instruction set when running on specific hardware. The OpenMP SIMD directive allows the developer to explicitly tell the compiler to vectorize a loop. In this case, human intervention will override the compilers sense of dependencies, but that is OK if the developer knows their application well.”

Empowering Cloud Utilization with Cloud Bursting

Cloud computing has become a strong alternative to in house data centers for a large percentage of all enterprise needs. Most enterprises are adopting some form of could computing, with some estimates that as high as 90 % are putting workloads into a public cloud infrastructure. The whitepaper, Empowering Cloud Utilization with Cloud Bursting is an excellent summary of various options for enterprises that are planning for using a public cloud infrastructure.

PreFetch for Intel Xeon Phi – Part 2

“An interesting aspect to prefetching is the distance ahead of the data that is being used to prefetch more data. This is a critical parameter for success and can be defined as how many iterations ahead to issue a prefetch instruction, and can be referred to as the distance. A compiler will automatically determine the distance to prefetch, and can be determined by looking at the compiler optimization reports.”