Today Nallatech announced the 510T FPGA co-processor. Designed to deliver ultimate performance per watt for compute-intensive datacenter applications, the 510T is a GPU-sized 16-lane PCIe 3.0 card featuring two of Altera’s new floating-point enabled Arria 10 FPGAs delivering up to sixteen times the performance of the previous generation. According to Nallatech, applications can achieve a total sustained performance of up to 3 TFlops.
Designating the appropriate provider for large MPI applications is critical to taking advantage of all of the compute power available. “A modern HPC system with multiple host cpus and multiple coprocessors such as the Intel Xeon Phi coprocessor housed in numerous racks can be optimized for maximum application performance with intelligent thread placement.”
“The combination of using a host cpu such as an Intel Xeon combined with a dedicated coprocessor such as the Intel Xeon Phi coprocessor has been shown in many cases to improve the performance of an application by significant amounts. When the datasets are large enough, it makes sense to offload as much of the workload as possible. But is this the case when the potential offload data sets are not as large?”
Today Advanced Clustering Technologies announced that the University of Central Oklahoma’s Center for Research and Education in Interdisciplinary Computation (CREIC) has selected the company to build their next supercomputer. The 32 Teraflop HPC cluster will be named “Buddy” in honor of the university’s mascot, Buddy Bronco.