Today Seagate Technology introduced the ClusterStor 300N storage system with Nytro Intelligent I/O Manager, the newest addition to its family of scale-out storage systems for high-performance computing and the first with a flash cache accelerator. “Seagate’s ClusterStor 300N expands on our proven, engineered systems approach that delivers performance efficiency and value for HPC environments of any size, using a hybrid technology architecture to handle tough workloads at a fraction of the cost of all-flash approaches.”
In this research report, we reveal recent research showing that customers are feeling the need for speed—i.e. they’re looking for more processing cores. Not surprisingly, we found that they’re investing more money in accelerators like GPUs and moreover are seeing solid positive results from using GPUs. In the balance of this report, we take a look at these finding and and the newest GPU tech from NVIDIA and how it performs vs. traditional servers and earlier GPU products.
From Megaflops to Gigaflops to Teraflops to Petaflops and soon to be Exaflops, the march in HPC is always on and moving ahead. This whitepaper details some of the technical challenges that will need to be addressed in the coming years in order to get to exascale computing.
With the introduction of the Intel Scalable System Framework, the Intel Xeon Phi processor can speed up Finite Element Analysis significantly. Using highly tuned math libraries such as the Intel Math Kernel Library (Intel MKL), FEA applications can execute math routines in parallel on the Intel Xeon Phi processor.
“With up to 72 processing cores, the Intel Xeon Phi processor x200 can accelerate applications tremendously. Each core contains two Advanced Vector Extensions, which speeds up the floating point performance. This is important for machine learning applications which in many cases use the Fused Multiply-Add (FMA) instruction.”
Today AMD, ARM, Huawei, IBM, Mellanox, Qualcomm, and Xilinx announced a collaboration to bring the CCIX high-performance open acceleration framework to data centers. The companies are collaborating on the specification for the new Cache Coherent Interconnect for Accelerators (CCIX). For the first time in the industry, a single interconnect technology specification will ensure that processors using different instruction set architectures (ISA) can coherently share data with accelerators and enable efficient heterogeneous computing – significantly improving compute efficiency for servers running data center workloads.
In this podcast, the Radio Free HPC team makes their tech predictions for 2016. Will secure firmware be the key differentiator for HPC vendors? Will this be the year of FPGAs? And could we see a 100 Petaflop machine on the TOP500 before the year ends?
In the past few years, accelerated computing has become strategically important for a wide range of applications. To gain performance on a variety of codes, hardware developers and software developers have concentrated their efforts to create systems that can accelerate certain applications by significant amount compared to what was previously possible.
OpenMP 4.0 standard now allows for the offloading of portions of the application, in order to take more advantage of many-core accelerators such as the Intel Xeon Phi coprocessor.
In this episode of This Week in HPC, Michael Feldman and Addison Snell from Intersect360 Research discuss the new Fortissimo Foundation from A3Cube, a clustered, pervasive, global direct-remote I/O access system. For more details, check out our A3Cube Slidecast over at insideBIGDATA. After that, they look at Paypal’s use of TI Keystone DSP processors for systems intelligence. By analyzing their chaotic real-time server data, Paypal is getting real-time, organized, intelligent results with extreme energy efficiency using HP’s Moonshot servers.