Today Curtiss-Wright’s Defense Solutions division announced that it is collaborating with Dolphin Interconnect Solutions to bring Dolphin’s eXpressWare PCIe Software Suite to the embedded aerospace and defense market. Available separately or as part of Curtiss-Wright’s OpenHPEC Accelerator Suite of best-in-class software tools, this PCIe Fabric Communications suite speeds and simplifies the design of high-speed, low-latency PCIe fabric-based peer-to-peer communications in OpenVPX-based High Performance Embedded Computing (HPEC) systems for demanding Radar, SIGINT and EW applications.
Raj Hazra presented this talk at ISC 2016. “As part of the company’s launch of the Intel Xeon Phi processor, Hazra describes how how cognitive computing and HPC are going to work together. “Intel will introduce and showcase a range of new technologies helping to fuel the path to deeper insight and HPC’s next frontier. Among this year’s new products is the Intel Xeon Phi processor. Intel’s first bootable host processor is specifically designed for highly parallel workloads. It is also the first to integrate both memory and fabric technologies. A bootable x86 CPU, the Intel Xeon Phi processor offers greater scalability and is capable of handling a wider variety of workloads and configurations than accelerator products.”
Today NVM Express, Inc. released the results of its fifth NVM Express (NVMe) Plugfest. The event was a distinct success, with the highest attendance to date. “NVM Express is quickly being adopted as a high performance interface standard for PCIe SSDs, and compatibility among different products is essential for greater market adoption,” said Frank Shu, VP of R&D, Verification Engineering & Compatibility Test at Silicon Motion Inc. “We are proud of having our products successfully pass through the NVMe Plugfest in ensuring compliance to the specification as well as interoperability with other NVMe products.”
Today the University of Maryland (UMD) and the U.S. Army Research Laboratory (ARL) announced a strategic partnership to provide HPC resources for use in higher education and research communities. As a result of this synergistic partnership, students, professors, engineers and researchers will have unprecedented access to technologies that enable scientific discovery and innovation.
This week the White House Office of Science and Technology Policy released the Strategic Plan for the NSCI Initiative. “The NSCI strives to establish and support a collaborative ecosystem in strategic computing that will support scientific discovery and economic drivers for the 21st century, and that will not naturally evolve from current commercial activity,” writes Altaf Carim, William Polk, and Erin Szulman from the OSTP in a blog post.
In this video from PASC16, Andrew Lumsdaine from Indiana University gives his perspectives on the conference. “The PASC16 Conference, co-sponsored by the Association for Computing Machinery (ACM) and the Swiss National Supercomputing Centre (CSCS), brings together research across the areas of computational science, high-performance computing, and various domain sciences.”
“With our latest innovations incorporating Intel Xeon Phi processors in a performance and density optimized Twin architecture and 100Gbps OPA switch for high bandwidth connectivity, our customers can accelerate their applications and innovations to address the most complex real world problems.”
Today Mellanox announced it has received the Award for Technology Innovation from Baidu, Inc. The award recognizes Mellanox’s achievements in designing and delivering a high-performance, low latency interconnect technology solution that positively impacts Baidu’s business. Mellanox Technologies received the award at the 2016 Baidu Datacenter Partner Conference, Baidu’s annual gathering of key datacenter partners, and was the only interconnect provider in this category.
In this Intel Chip Chat podcast, Alyson Klein and Charlie Wuischpard describe Intel’s investment to break down walls to HPC adoption and move innovation forward by thinking at a system level. “Charlie discusses the announcement of the Intel Xeon Phi processor, which is a foundational element of Intel Scalable System Framework (Intel SSF), as well as Intel Omni-Path Fabric. Charlie also explains that these enhancements will make supercomputing faster, more reliable, and increase efficient power consumption; Intel has achieved this by combining the capabilities of various technologies and optimizing ways for them to work together.”
“We are pioneering the area of virtualized clusters, specifically with SR-IOV,” said Philip Papadopoulos, SDSC’s chief technical officer. “This will allow virtual sub-clusters to run applications over InfiniBand at near-native speeds – and that marks a huge step forward in HPC virtualization. In fact, a key part of this is virtualization for customized software stacks, which will lower the entry barrier for a wide range of researchers by letting them project an environment they already know onto Comet.”