In this special guest feature, Linda Barney writes that researchers at the University of Cambridge are using an Intel Xeon Phi coprocessor-based supercomputer from SGI to accelerate discovery efforts. “We have managed to modernize and optimize the main workhorse code used in the research so it now runs at 1/100-1/1000 of the original runtime. This allows us to tackle problems which would have taken unfeasibly long to solve. Secondly, it has opened windows for previously unthinkable research, namely using the MODAL code in cosmological parameter search: this is a problem which is constantly being solved in an iterative process, but adding the MODAL results to the process has only become possible with the improved performance.”
“Argonne National Laboratory is one of the labs helping to lead the exascale push for the nation with the DOE. We lead in a numbers of areas with software and storage systems and applied math. And we’re really focusing, our expertise is focusing on those new ideas, those novel new things that will allow us to sort of leapfrog the standard slow evolution of technology and get something further out ahead, three years, five years out ahead. And that’s where our research is focused.”
Sometimes the inbox for HPC news fills up faster than we can handle. In an effort to keep up, we’ve compiled noteworthy news into a Jeopardy type of Speed Round that phrases topics in the form a question.
“We are excited that the H2020 SAGE Project gives us the opportunity to research and move HPC storage into the Exascale age,” said Ken Claffey, vice president and general manager, Seagate HPC systems business. “Seagate will contribute its unique skills and device technology to address the convergence of Exascale and Big Data, with an excellent selection of participants each bringing their own capabilities together to build the future of storage on an unprecedented scale.”
In this podcast, the Radio Free HPC team goes over a Trip Report from Rich Brueckner from insideHPC, who’s been on the road at a series of HPC conferences. We captured more that 50 talks in the past month, and we have them all right here with the very latest in High Performance Computing.
DK Panda from Ohio State University presented this talk at the HPC Advisory Council Spain Conference. “Dr. Panda and his research group members have been doing extensive research on modern networking technologies including InfiniBand and 10-40GE/iWARP. His research group is currently collaborating with National Laboratories and leading InfiniBand and 10-40GE/iWARP companies on designing various subsystems of next generation high-end systems.”
“The UCX Unified Communication X project is a collaboration between industry, laboratories, and academia to create an open-source production grade communication framework for data centric and high-performance applications. At the core of the UCX project are the combined features, ideas, and concepts of industry leading technologies including MXM, PAMI and UCCS. Mellanox Technologies has contributed their MXM technology, which provides enhancements to parallel communication.”
In this video from the 2015 HPC Advisory Council Spain Conference, Gilad Shainer moderates a panel discussion on Exascale computing.
Peter Hopton from Iceotope presented this talk at the HPC User Forum. “ExaNeSt will develop, evaluate, and prototype the physical platform and architectural solution for a unified Communication and Storage Interconnect and the physical rack and environmental structures required to deliver European Exascale Systems. The consortium brings technology, skills, and knowledge across the entire value chain from computing IP to packaging and system deployment; and from operating systems, storage, and communication to HPC with big data management, algorithms, applications, and frameworks. Building on a decade of advanced R&D, ExaNeSt will deliver the solution that can support exascale deployment in the follow-up industrial commercialization phases.”
In this video (with transcript) from the 2015 HPC User Forum in Broomfield, Bob Sorenson from IDC moderates a User Agency panel discussion on the NSCI initiative. “You all have seen that usable statement inside the NSCI, and we are all about trying to figure out how to make usable machines. That is a key critical component as far, as we’re concerned. But the thing that I think we’re really seeing, we talked about the fact that a single thread performance is not increasing, and so what we’re doing is we’re simply increasing the parallelism and then the physics limitations, if you will, of how you cool and distribute power among the parts that are there. That really is leading to a paradigm shift from something that’s based on how fast you can crunch the numbers to how fast you can feed the chips with data. It’s really that paradigm shift, I think, more than anything else that’s really going to change the way that we have to do our computing.”