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Exascale Architecture Trends and Implications for Programming Systems

John Shalf presented this talk at EASC2016 in Stockholm. “This talk will describe the challenges of programming future computing systems. It will then provide some highlights from the search for durable programming abstractions more closely track emerging computer technology trends so that when we convert our codes over, they will last through the next decade.”

Video: The Vital Importance of HPC to U.S. Competitiveness and National Security

In this video, ITIF hosts a hearing on the The Vital Importance of High-Performance Computing to U.S. Competitiveness and National Security. Their recently published report urges U.S. policymakers to take decisive steps to ensure the United States continues to be a world leader in high-performance computing.

Nvidia CTO Steve Oberlin to Discuss Rise of GPUs at NCSA 30th Anniversary

Steve Oberlin, chief technology officer for accelerated computing at NVIDIA, will give two NCSA 30th Anniversary Featured Lectures on May 26. The morning talk is tailored for NCSA staff, Computer Science, and Electrical and Computer Engineering students and faculty. The second talk is open to the public.

Register for ISC 2016 by May 11 for Early Bird Discounts

There is still time to take advantage of Early Bird registration rates for ISC 2016. You can save over 45 percent off the on-site registration rates if you sign up by May 11. “ISC 2016 takes place June 19-23 in Frankfurt, Germany. With an expected attendance of 3,000 participants from around the world, ISC will also host 146 exhibitors from industry and academia.”

Peta-Exa-Zetta: Robert Wisniewski and the Growth of Compute Power

While much noise is being made about the race to exascale, building productive supercomputers really comes down to people and ingenuity. In this special guest feature, Donna Loveland profiles supercomputer architect Robert Wisniewski from Intel. “In combining the threading and memory challenges, there’s an increased need for the hardware to perform synchronization operations, especially intranode ones, efficiently. With more threads utilizing less memory with wider parallelism, it becomes important that they synchronize among themselves efficiently and have access to efficient atomic memory operations. Applications also need to be vectorized to take advantage of the wider FPUs on the chip. While much of the vectorization can be done by compilers, application developers can follow design patterns that aid the compiler’s task.”

X-Stack PI Meeting Showcases Exascale Code

Berkeley Lab recently hosted the fourth annual X-Stack PI event, where X-Stack researchers, facilities teams, application scientists, and developers from national labs, universities, and industry met to share the latest developments in X-Stack application codes. “X-Stack was launched in 2012 by the U.S. Department of Energy’s Advanced Scientific Computing Research program to support the development of exascale software tools, including programming languages and libraries, compilers and runtime systems, that will help programmers handle massive parallelism, data movement, heterogeneity and failures as the scientific community transitions to the next generation of extreme-scale supercomputers.”

Spectra Logic Rolls Out World’s Largest Capacity Tape Library

Today Spectra Logic announced the Spectra TFinity ExaScale Edition, the world’s largest and most richly-featured tape storage system. “Since 2008, Spectra Logic has worked with engineers in the NASA Advanced Supercomputing (NAS) Division at NASA’s Ames Research Center, in California’s Silicon Valley, first deploying a Spectra tape library with 22 petabytes of capacity. According to NASA, the Spectra tape library’s capacity has grown to approximately one half an Exabyte of archival storage today. After extensive testing over the past year, NASA recently deployed a Spectra TFinity ExaScale Edition in their 24×7 production HPC environment.”

Slidecast: Advantages of Offloading Architectures for HPC

In this slidecast, Gilad Shainer from Mellanox describes the advantages of InfiniBand and the company’s off-loading network architecture for HPC. “The path to Exascale computing is clearly paved with Co-Design architecture. By using a Co-Design approach, the network infrastructure becomes more intelligent, which reduces the overhead on the CPU and streamlines the process of passing data throughout the network. A smart network is the only way that HPC data centers can deal with the massive demands to scale, to deliver constant performance improvements, and to handle exponential data growth.”

Distinguished Speaker Series Coming to ISC 2016

Today ISC 2016 announced that five renowned experts in computational science will participate in their new Distinguished Speaker series. Topics will include exascale computing efforts in the US, the next supercomputers in development in Japan and China, cognitive computing advancements at IBM, and quantum computing research at NASA.

NSCI Update from the HPC User Forum

In this video from the HPC User Forum in Tucson, Saul Gonzalez Martirena from NSF provides an update on the NSCI initiative. “As a coordinated research, development, and deployment strategy, NSCI will draw on the strengths of departments and agencies to move the Federal government into a position that sharpens, develops, and streamlines a wide range of new 21st century applications. It is designed to advance core technologies to solve difficult computational problems and foster increased use of the new capabilities in the public and private sectors.”